Many electronic systems require pulsed signals in which an electronic signal transitions temporarily from a first value to a second value before returning to the first value again. For example, certain power converters utilize pulse-width modulators to control the amount of charge that flows between two different power regimes. As another example, phase-locked loops often utilize a charge pump to keep track of two streams of pulses in order to adjust a degree of phase shift introduced to a signal in order to phase-lock that signal. If the length of a pulse is too short, there is a possibility that downstream circuit blocks will not register the pulse. In other words, if the transition to the second value and back again happens too quickly, the system might not notice that the pulse ever existed.
The problem of missed pulses can be problematic. The accuracy or power efficiency of a system may degrade due to missed pulses. In a more severe case, missed pulses may drive a circuit into an undesirable state that was not anticipated by the designers. For example, missed pulses can cause a latch to fail to read the appropriate input and can store an improper state.
Minimum pulses can be avoided by building a margin of error into a given design so that a worst-case error will still maintain the width of a pulse above a specified threshold. This threshold can be set to the worst-case response time of downstream circuits. However, such an approach can be problematic in that the margin of error can result in a less efficient system. For example, some switched-mode power converters are designed to only allow one pulse to be delivered to the power transistors per switching cycle even during a transient condition in which it would be advantageous to allow more frequent pulses and allow faster settling into another state. An approach that allows for more than one pulse in each period without the danger of entering an unstable state would result in a more efficient device with superior performance.